Re: [V3][PATCH 0/7] perf, x86: Implement AMD IBS

[Robert Richter]

On 04.10.11 04:54:09, Ingo Molnar wrote:
> So the whole IBS thing looks quite unintegrated to me - and that's 
> partly because the hw is admittedly weird. The way we could perhaps 
> live with it upstream is two conditions:
> 
>  - Testable IBS user-space code a bit more prominently integrated
>    than having to go down into a cellar with no working lights and 
>    finding the code on display in tools/perf/Documentation/examples/ 
>    on the bottom of a locked filing cabinet stuck in a disused
>    lavatory with a sign on the door saying 'Beware of the Leopard.'

With Lin Ming's patch

 [PATCH v2 6/6] perf tool: Parse general/raw events from sysfs

you can use perf record to collect IBS samples, e.g.:

 # perf record -e ibs_fetch:r0 -c 100000 -a bash -c someload
 [ perf record: Woken up 3 times to write data ]
 [ perf record: Captured and wrote 2.004 MB perf.data (~87572 samples) ]

With Stephane's patch

 [PATCH] perf: make perf.data more self-descriptive (v8)

I could extend perf report to add an IBS parser (I need to know the
pmu name/type value mapping).

Do you have something like that in mind?

As all these patches are still off-tree I would rather prefer to
decouple the IBS patches from a parser implementation and add it later
as a single patch series. Hmm?

>  - Only root/privileged users should be able to access it. Right now
>    i think it's root-only due to percpu restrictions, but wanted to 
>    mention it that this is an explicit requirement.

Yes, IBS is restricted to percpu. And percpu requires root privileges
like all other pmu events. What is your point here?

-Robert

-- 
Advanced Micro Devices, Inc.
Operating System Research Center

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