Re: [PATCH 1/8] regmap: Introduce caching support

[Lars-Peter Clausen]

On 09/05/2011 11:43 AM, Dimitris Papastamos wrote:
> [...]
>>>  /**
>>>   * Default value for a register.  We use an array of structs rather
>>>   * than a simple array as many modern devices have very sparse
>>> @@ -50,9 +55,11 @@ struct reg_default {
>>>   *                (eg, a clear on read interrupt status register).
>>>   *
>>>   * @max_register: Optional, specifies the maximum valid register index.
>>> - * @reg_defaults: Power on reset values for registers (for use with
>>> - *                register cache support).
>>> - * @num_reg_defaults: Number of elements in reg_defaults.
>>> + *
>>> + * @cache_type: The actual cache type.
>>> + * @cache_defaults_raw: Power on reset values for registers (for use with
>>> + *                 register cache support).
>>> + * @num_cache_defaults_raw: Number of elements in cache_defaults_raw.
>>>   */
>>>  struct regmap_config {
>>>  	int reg_bits;
>>> @@ -64,8 +71,10 @@ struct regmap_config {
>>>  	bool (*precious_reg)(struct device *dev, unsigned int reg);
>>>  
>>>  	unsigned int max_register;
>>> -	struct reg_default *reg_defaults;
>>> -	int num_reg_defaults;
>>
>> I guess these were removed by accident due to some merge conflict as they were
>> added just recently. It would be good if you could re-add them and if they are
>> set initialize cache_defaults using a memdup instead of reading cache_defaults_raw.
>>
>>> +
>>> +	enum regcache_type cache_type;
>>> +	const void *cache_defaults_raw;
>>> +	unsigned num_cache_defaults_raw;
>>>  };
>>>  
>>>  typedef int (*regmap_hw_write)(struct device *dev, const void *data,
> 
> I was merely renaming these.

And you changed the type. We need the reg_default type register defaults for
devices which have a sparse registers set or where the base register address is
at a larger offset.

- Lars
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