Re: [PATCH 0/7] perf, x86: Implement AMD IBS

[Robert Richter]

On 12.08.11 21:43:44, Robert Richter wrote:
> On 02.08.11 07:29:55, Peter Zijlstra wrote:
> > Right, so comparing Fam10 to Fam12,
> > 
> > + IbsOpCtl.19:58
> > + IbsOpData.38
> > - IbsOpData2.4:5
> 
> Yeah, good catch. This is due to the different northbridge
> implementations. I will ask the hw guys how to handle this.

Both bits are meant to be architectural and defined the same on all
cpus. On families 12h and 14h they always return 0. The documentation
will be updated accordingly.

Thanks,

-Robert

-- 
Advanced Micro Devices, Inc.
Operating System Research Center

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/