Re: [PATCH] perf events, x86: Implement Sandybridge last-levelcache events

[Peter Zijlstra]

On Tue, 2011-05-10 at 22:17 +0800, Lin Ming wrote:
> 
> I'm also not sure if the bits combination do count exactly
> L3_HIT/_MISS.
> 
<snip manual bits>

> May need some micro-benchmarks to verify it. 

either that or ask for clarification internally.

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