Re: [PATCH -tip] perf, x86: P4 PMU - Add missing read of a counterbefore test

[Cyrill Gorcunov]

On 03/24/2011 07:51 PM, Ingo Molnar wrote:
> 
> * Cyrill Gorcunov <gorcunov@xxxxxxxxx> wrote:
> 
>> Unflagged overflows never have been catched due to missed read of a register which
>> is to signalize about it, and as result unknown nmi may happen leading to
>> "Dazen and confused" message. That is what supposed to be in changelog?
> 
> Exactly, the 'Dazed and confused' message is *all* that the user cares about so 
> it must feature prominently in the changelog.
> 
> If a P4 user searches lkml he wants to know which fixed address 
> dazed-and-confused messages. He will know nothing about 'unflagged overflows' 
> or other internals ...
> 
> All the other details about how the patch does the fix is secondary to what 
> users experience when they hit this bug.
> 
> Thanks,
> 
> 	Ingo

ok, let me try
---
From: Don Zickus <dzickus@xxxxxxxxxx>
Subject: [PATCH -tip] perf, x86: P4 PMU - Catch unknown NMI on unflagged overflows

The read of a proper MSR register was missed and instead of counter the
configration register was tested (it has ARCH_P4_UNFLAGGED_BIT always
cleared) leading to unknown NMI hitting the system. As result the user may
obtain "Dazed and confused, but trying to continue" message. Fix it by reading
a proper MSR register.

Signed-off-by: Don Zickus <dzickus@xxxxxxxxxx>
Signed-off-by: Cyrill Gorcunov <gorcunov@xxxxxxxxxx>
---
 arch/x86/kernel/cpu/perf_event_p4.c |    1 +
 1 file changed, 1 insertion(+)

Index: linux-2.6.tip/arch/x86/kernel/cpu/perf_event_p4.c
===================================================================
--- linux-2.6.tip.orig/arch/x86/kernel/cpu/perf_event_p4.c
+++ linux-2.6.tip/arch/x86/kernel/cpu/perf_event_p4.c
@@ -777,6 +777,7 @@ static inline int p4_pmu_clear_cccr_ovf(
 	 * the counter has reached zero value and continued counting before
 	 * real NMI signal was received:
 	 */
+	rdmsrl(hwc->event_base, v);
 	if (!(v & ARCH_P4_UNFLAGGED_BIT))
 		return 1;

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