Re: [PATCH] isp1760: Flush the D-cache for the pipe-in transferbuffers

[Catalin Marinas]

On Tue, 2010-02-02 at 15:41 +0000, Ming Lei wrote:
> 2010/2/2 Catalin Marinas <catalin.marinas@xxxxxxx>:
> 
> > +       if (usb_pipein(urb->pipe) && usb_pipetype(urb->pipe) == PIPE_BULK) {
> > +               void *ptr;
> > +               for (ptr = urb->transfer_buffer;
> > +                    ptr < urb->transfer_buffer + urb->transfer_buffer_length;
> > +                    ptr += PAGE_SIZE)
> > +                       flush_dcache_page(virt_to_page(ptr));
> 
> If the page is mapped into highmem, seems virt_to_page doesn't work well.

You are right but is it possible that we get a highmem virtual address
in this case?

As for a general solution, maybe trying to define something like a pio_*
API would work better.

-- 
Catalin

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