Re: USB mass storage and ARM cache coherency

[Oliver Neukum]

Am Montag, 1. Februar 2010 18:29:14 schrieb Catalin Marinas:
> +       if (usb_pipein(urb->pipe) && usb_pipetype(urb->pipe) == PIPE_BULK) {
> +               void *ptr;
> +               for (ptr = urb->transfer_buffer;
> +                    ptr < urb->transfer_buffer + urb->transfer_buffer_length;
> +                    ptr += PAGE_SIZE)
> +                       flush_dcache_page(virt_to_page(ptr));

Is it correct to limit this to BULK pipes?

	Regards
		Oliver

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