Re: [patch] x86, apic: use 0x20 for the IRQ_MOVE_CLEANUP_VECTOR instead of 0x1f

From: Eric W. Biederman
Date: Mon Jan 11 2010 - 19:28:45 EST


"H. Peter Anvin" <hpa@xxxxxxxxx> writes:

> On 01/11/2010 04:06 PM, Suresh Siddha wrote:
>>>
>>> Yes, that's what I said. My question was to Suresh what enforces that
>>> in the case of his patch, which moves the legacy range into the middle
>>> of the device vectors.
>>
>> It's not the used_vector bitmap. That range will appear as used on all
>> the cpu's and hence we won't be allocating it for anything else.
>>
>
> OK, fair enough.
>
>> Now the question is: for non-legacy (io-apic) case, instead of reserving
>> this range for all the cpu's, does it make sense to generalize like any
>> other vector?
>
> It sounds like something that we could experiment with -- after
> switching an IRQ to ioapic mode, make it a movable interrupt. It
> *seems* it should work, but it's scary stuff to muck with.
>
> Eric, do you see any reason why it wouldn't work? I truly couldn't
> understand your previous remark, especially the bit about "it is
> dangerous to play lowest priority irq games in that range".

Sorry. I suck at multitasking.

Without changes assign_irq_vector will reuse vectors in the range
IRQ0_VECTOR to IRQ15_VECTOR in the code as it we currently ship it,
when we switch irq0-15 into ioapic mode.

Switching the loop to cover IRQ0_VECTOR to IRQ15_VECTOR is not a
problem. I don't think it will find anything free as we assign those
vectors on all cpus, but the data structures are fine.

I am uncomfortable with the suggestion of sharing the priority of the
IRQ_MOVE_CLEANUP_VECTOR with other interrupts. I know if it had be
clear from the documentation that it was safe to share the irq level
with other interrupts I would not have reserved the entire interrupt
level for the IRQ_MOVE_CLEANUP_VECTOR.

Eric
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