Re: [Fdutils] DMA cache consistency bug introduced in 2.6.28

[Andi Kleen]

On Wed, Dec 23, 2009 at 08:49:38AM -0800, Linus Torvalds wrote:
> 
> 
> On Wed, 23 Dec 2009, Andi Kleen wrote:
> > 
> > I suspect it's a system where the APIC timer stops in deeper idle
> > states and it supports them. In this case CPU #0 does timer broadcasts
> > when needed to wake the other CPUs up from deep C, but for that it has
> > to run with HPET. At least the other ones can still enjoy the LAPIC
> > timer.
> 
> Ahh, ok, that makes sense. I was assuming the broadcast timer would act in 
> that capacity, but..

The "broadcasts" are done using IPIs from cpu #08 and only when that target 
CPU is deep idle.  That's more efficient than letting the hardware
always broadcast.

> 
> > This might suggest that Mark's floppy controller doesn't like
> > deep C? Mark, did you try booting with processor.max_cstate=1
> > and HPET enabled?
> 
> We have indeed had historical issues with floppy and sleep states before. 

I removed that code when moving to 64bit (floppy driver disabling C1),
but perhaps we need some variant of it again (but it's the first such
report in many years). Although it would be sad to have it again on all 
systems.

-Andi
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