Re: [PATCH 3/7] mtrr: Remove use_intel()

[Yinghai Lu]

2009/12/8 MichaÅ MirosÅaw <mirq-linux@xxxxxxxxxxxx>:
> Remove use_intel() and use is_cpu(INTEL) instead.
>
> .use_intel_if is duplicating information already found in .vendor, as
> the only combinations used are:
> Â Âgeneric: use_intel_if == 1, vendor == INTEL
> Â Âamd/cyrix/centaur: use_intel_if == 0, vendor != INTEL
>
> Signed-off-by: MichaÅ MirosÅaw <mirq-linux@xxxxxxxxxxxx>
> ---
> Âarch/x86/kernel/cpu/mtrr/generic.c | Â Â1 -
> Âarch/x86/kernel/cpu/mtrr/main.c  Â|  14 +++++++-------
> Âarch/x86/kernel/cpu/mtrr/mtrr.h  Â|  Â2 --
> Âarch/x86/kernel/cpu/mtrr/state.c  |  10 +++++-----
> Â4 files changed, 12 insertions(+), 15 deletions(-)
>
> diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c
> index 4d75584..1651877 100644
> --- a/arch/x86/kernel/cpu/mtrr/generic.c
> +++ b/arch/x86/kernel/cpu/mtrr/generic.c
> @@ -753,7 +753,6 @@ int positive_have_wrcomb(void)
> Â* Generic structure...
> Â*/
> Âconst struct mtrr_ops generic_mtrr_ops = {
> -    .use_intel_if      = 1,
>    Â.set_all        Â= generic_set_all,
>    Â.get          Â= generic_get_mtrr,
>    Â.get_free_region    Â= generic_get_free_region,
> diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c
> index 628f3dd..bc3436e 100644
> --- a/arch/x86/kernel/cpu/mtrr/main.c
> +++ b/arch/x86/kernel/cpu/mtrr/main.c
> @@ -107,7 +107,7 @@ static void __init set_num_var_ranges(void)
> Â{
> Â Â Â Âunsigned long config = 0, dummy;
>
> - Â Â Â if (use_intel())
> + Â Â Â if (is_cpu(INTEL))
> Â Â Â Â Â Â Â Ârdmsr(MSR_MTRRcap, config, dummy);
> Â Â Â Âelse if (is_cpu(AMD))
> Â Â Â Â Â Â Â Âconfig = 2;
> @@ -692,7 +692,7 @@ void __init mtrr_bp_init(void)
> Â Â Â Âif (mtrr_if) {
> Â Â Â Â Â Â Â Âset_num_var_ranges();
> Â Â Â Â Â Â Â Âinit_table();
> - Â Â Â Â Â Â Â if (use_intel()) {
> + Â Â Â Â Â Â Â if (is_cpu(INTEL)) {
> Â Â Â Â Â Â Â Â Â Â Â Âget_mtrr_state();
>
> Â Â Â Â Â Â Â Â Â Â Â Âif (mtrr_cleanup(phys_addr)) {
> @@ -705,7 +705,7 @@ void __init mtrr_bp_init(void)
>
> Âvoid mtrr_ap_init(void)
> Â{
> - Â Â Â if (!use_intel() || mtrr_aps_delayed_init)
> + Â Â Â if (!is_cpu(INTEL) || mtrr_aps_delayed_init)
> Â Â Â Â Â Â Â Âreturn;
> Â Â Â Â/*
> Â Â Â Â * Ideally we should hold mtrr_mutex here to avoid mtrr entries
> @@ -733,7 +733,7 @@ void mtrr_save_state(void)
>
> Âvoid set_mtrr_aps_delayed_init(void)
> Â{
> - Â Â Â if (!use_intel())
> + Â Â Â if (!is_cpu(INTEL))
> Â Â Â Â Â Â Â Âreturn;
>
> Â Â Â Âmtrr_aps_delayed_init = true;
> @@ -744,7 +744,7 @@ void set_mtrr_aps_delayed_init(void)
> Â*/
> Âvoid mtrr_aps_init(void)
> Â{
> - Â Â Â if (!use_intel())
> + Â Â Â if (!is_cpu(INTEL))
> Â Â Â Â Â Â Â Âreturn;
>
> Â Â Â Âset_mtrr(~0U, 0, 0, 0);
> @@ -753,7 +753,7 @@ void mtrr_aps_init(void)
>
> Âvoid mtrr_bp_restore(void)
> Â{
> - Â Â Â if (!use_intel())
> + Â Â Â if (!is_cpu(INTEL))
> Â Â Â Â Â Â Â Âreturn;
>
> Â Â Â Âmtrr_if->set_all();
> @@ -764,7 +764,7 @@ static int __init mtrr_init_finialize(void)
> Â Â Â Âif (!mtrr_if)
> Â Â Â Â Â Â Â Âreturn 0;
>
> - Â Â Â if (use_intel()) {
> + Â Â Â if (is_cpu(INTEL)) {
> Â Â Â Â Â Â Â Âif (!changed_by_mtrr_cleanup)
> Â Â Â Â Â Â Â Â Â Â Â Âmtrr_state_warn();
> Â Â Â Â Â Â Â Âreturn 0;
> diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.h b/arch/x86/kernel/cpu/mtrr/mtrr.h
> index be2867c..562e2e3 100644
> --- a/arch/x86/kernel/cpu/mtrr/mtrr.h
> +++ b/arch/x86/kernel/cpu/mtrr/mtrr.h
> @@ -13,7 +13,6 @@ extern unsigned int mtrr_usage_table[MTRR_MAX_VAR_RANGES];
>
> Âstruct mtrr_ops {
> Â Â Â Âu32 Â Â vendor;
> - Â Â Â u32 Â Â use_intel_if;
>    Âvoid  Â(*set)(unsigned int reg, unsigned long base,
> Â Â Â Â Â Â Â Â Â Â Â unsigned long size, mtrr_type type);
>    Âvoid  Â(*set_all)(void);
> @@ -62,7 +61,6 @@ extern u64 size_or_mask, size_and_mask;
> Âextern const struct mtrr_ops *mtrr_if;
>
> Â#define is_cpu(vnd) Â Â(mtrr_if && mtrr_if->vendor == X86_VENDOR_##vnd)
> -#define use_intel() Â Â(mtrr_if && mtrr_if->use_intel_if == 1)
>
> Âextern unsigned int num_var_ranges;
> Âextern u64 mtrr_tom2;
> diff --git a/arch/x86/kernel/cpu/mtrr/state.c b/arch/x86/kernel/cpu/mtrr/state.c
> index dfc80b4..3bdbf50 100644
> --- a/arch/x86/kernel/cpu/mtrr/state.c
> +++ b/arch/x86/kernel/cpu/mtrr/state.c
> @@ -17,7 +17,7 @@ void set_mtrr_prepare_save(struct set_mtrr_context *ctxt)
> Â Â Â Â/* Disable interrupts locally */
> Â Â Â Âlocal_irq_save(ctxt->flags);
>
> - Â Â Â if (use_intel() || is_cpu(CYRIX)) {
> + Â Â Â if (is_cpu(INTEL) || is_cpu(CYRIX)) {
>
> Â Â Â Â Â Â Â Â/* Save value of CR4 and clear Page Global Enable (bit 7) */
> Â Â Â Â Â Â Â Âif (cpu_has_pge) {
> @@ -34,7 +34,7 @@ void set_mtrr_prepare_save(struct set_mtrr_context *ctxt)
> Â Â Â Â Â Â Â Âwrite_cr0(cr0);
> Â Â Â Â Â Â Â Âwbinvd();
>
> - Â Â Â Â Â Â Â if (use_intel()) {
> + Â Â Â Â Â Â Â if (is_cpu(INTEL)) {
> Â Â Â Â Â Â Â Â Â Â Â Â/* Save MTRR state */
> Â Â Â Â Â Â Â Â Â Â Â Ârdmsr(MSR_MTRRdefType, ctxt->deftype_lo, ctxt->deftype_hi);
> Â Â Â Â Â Â Â Â} else {
> @@ -49,7 +49,7 @@ void set_mtrr_prepare_save(struct set_mtrr_context *ctxt)
>
> Âvoid set_mtrr_cache_disable(struct set_mtrr_context *ctxt)
> Â{
> - Â Â Â if (use_intel()) {
> + Â Â Â if (is_cpu(INTEL)) {
> Â Â Â Â Â Â Â Â/* Disable MTRRs, and set the default type to uncached */
> Â Â Â Â Â Â Â Âmtrr_wrmsr(MSR_MTRRdefType, ctxt->deftype_lo & 0xf300UL,
> Â Â Â Â Â Â Â Â Â Â Âctxt->deftype_hi);
> @@ -64,13 +64,13 @@ void set_mtrr_cache_disable(struct set_mtrr_context *ctxt)
> Â/* Restore the processor after a set_mtrr_prepare */
> Âvoid set_mtrr_done(struct set_mtrr_context *ctxt)
> Â{
> - Â Â Â if (use_intel() || is_cpu(CYRIX)) {
> + Â Â Â if (is_cpu(INTEL) || is_cpu(CYRIX)) {
>
> Â Â Â Â Â Â Â Â/* Flush caches and TLBs */
> Â Â Â Â Â Â Â Âwbinvd();
>
> Â Â Â Â Â Â Â Â/* Restore MTRRdefType */
> - Â Â Â Â Â Â Â if (use_intel()) {
> + Â Â Â Â Â Â Â if (is_cpu(INTEL)) {
> Â Â Â Â Â Â Â Â Â Â Â Â/* Intel (P6) standard MTRRs */
> Â Â Â Â Â Â Â Â Â Â Â Âmtrr_wrmsr(MSR_MTRRdefType, ctxt->deftype_lo,
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â ctxt->deftype_hi);
> --

can you check it with amd64 cpu?

YH
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