Re: Disabling DMA with ICH10?

[Alan Cox]

> I thought that PIO transfers (which I understand to be
> write32()/read32()'s) unlike DMA transfers could be interrupted by an
> high-priority interrupt. Is that wrong?

Yes. An I/O cycle will stall that CPU thread (and sometimes more) until
it completes. Not only that but the only way to do PIO only at the
hardware level is to take the controller out of AHCI mode into legacy
mode which means doing a lot of PIO accesses routed to the drive.

> Actually, that's what I do - except for locking the page, yet. I do need
> to access the PCI bus in real time, though. So I wonder what happens

I didnt think any system with an ICH10 even had a legacy PCI bus.

> when the RT CPU is getting data from the PCI device, doing some
> calculations on it and then writing back some data to the device,
> __while at the same time__ another (non-RT) CPU starts a DMA transfer. I
> figured the DMA would block the PCI bus,

It depends upon how you have configured the bus, devices and chipset what
priority rules are active and also what size bursts are used for the
transfers. In particular read up on the PCI latency setting for legacy
PCI bus devices.

Alan
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