[PATCH tracing/kprobes 2/3] x86: Add VIA processor instructions

[Masami Hiramatsu]

Add VIA processor's Padlock instructions(MONTMUL, XSHA1, XSHA256).

Signed-off-by: Masami Hiramatsu <mhiramat@xxxxxxxxxx>
Reported-by: Ingo Molnar <mingo@xxxxxxx>
Cc: Steven Rostedt <rostedt@xxxxxxxxxxx>
Cc: Jim Keniston <jkenisto@xxxxxxxxxx>
Cc: Ananth N Mavinakayanahalli <ananth@xxxxxxxxxx>
Cc: Andi Kleen <ak@xxxxxxxxxxxxxxx>
Cc: Christoph Hellwig <hch@xxxxxxxxxxxxx>
Cc: Frank Ch. Eigler <fche@xxxxxxxxxx>
Cc: Frederic Weisbecker <fweisbec@xxxxxxxxx>
Cc: H. Peter Anvin <hpa@xxxxxxxxx>
Cc: Jason Baron <jbaron@xxxxxxxxxx>
Cc: K.Prasad <prasad@xxxxxxxxxxxxxxxxxx>
Cc: Lai Jiangshan <laijs@xxxxxxxxxxxxxx>
Cc: Li Zefan <lizf@xxxxxxxxxxxxxx>
Cc: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
Cc: Srikar Dronamraju <srikar@xxxxxxxxxxxxxxxxxx>
Cc: Tom Zanussi <tzanussi@xxxxxxxxx>
---

 arch/x86/lib/x86-opcode-map.txt |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletions(-)

diff --git a/arch/x86/lib/x86-opcode-map.txt b/arch/x86/lib/x86-opcode-map.txt
index 59e20d5..78a0daf 100644
--- a/arch/x86/lib/x86-opcode-map.txt
+++ b/arch/x86/lib/x86-opcode-map.txt
@@ -469,7 +469,7 @@ a2: CPUID
 a3: BT Ev,Gv
 a4: SHLD Ev,Gv,Ib
 a5: SHLD Ev,Gv,CL
-a6:
+a6: GrpPDLK
 a7: GrpRNG
 a8: PUSH GS (d64)
 a9: POP GS (d64)
@@ -803,6 +803,12 @@ GrpTable: Grp16
 3: prefetch T2
 EndTable
 
+GrpTable: GrpPDLK
+0: MONTMUL
+1: XSHA1
+2: XSHA2
+EndTable
+
 GrpTable: GrpRNG
 0: xstore-rng
 1: xcrypt-ecb


-- 
Masami Hiramatsu

Software Engineer
Hitachi Computer Products (America), Inc.
Software Solutions Division

e-mail: mhiramat@xxxxxxxxxx
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