One question about perf_counter on IA

From: Yong Wang
Date: Wed May 27 2009 - 03:37:53 EST


I noticed that the LVT error register is masked and then unmasked during
perf_counter initialization on IA in arch/x86/kernel/cpu/perf_counter.c

void perf_counters_lapic_init(int nmi)
{
u32 apic_val;

if (!x86_pmu_initialized())
return;

/*
* Enable the performance counter vector in the APIC LVT:
*/
apic_val = apic_read(APIC_LVTERR);

apic_write(APIC_LVTERR, apic_val | APIC_LVT_MASKED);
if (nmi)
apic_write(APIC_LVTPC, APIC_DM_NMI);
else
apic_write(APIC_LVTPC, LOCAL_PERF_VECTOR);
apic_write(APIC_LVTERR, apic_val);
}

Why is this needed? Is this documented somewhere in the spec? I tried
commenting out the masking and unmasking operations and I did not any
error interrupt generated.

Thanks
-Yong
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