RCU: Number of grace-periods

From: Dmitriy V'jukov
Date: Wed Mar 11 2009 - 06:59:16 EST


In the article "The design of preemptible read-copy-update":
http://lwn.net/Articles/253651

Paul McKenney explains why number of grace periods before executing callbacks is
set to 2:
#define GP_STAGES 2

There are following statements in the reasoning:
"Note that because rcu_read_lock() does not contain any memory barriers, the
contents of the critical section might be executed early by the CPU"
and:
"However, because rcu_read_unlock() contains no memory barriers, the contents of
the corresponding RCU read-side critical section (possibly including a reference
to the item deleted by CPU 0) can be executed late by CPU 1"

But on some architectures (IA-32, Intel 64, SPARC TSO) acquire and release
fences are implied with every load/store (read - costless), so isn't it possible
to reduce the number of required grace periods before executing callbacks on
these architectures?
I.e. something like:
#ifdef ACQUIRE_RELEASE_FENCES_ARE_IMPLIED_ON_ARCH // defined for x86 etc
#define GP_STAGES 1
#else
#define GP_STAGES 2
#endif
Have someone considered such variant? Is it worth doing?
Thank you.

--
Best regards,
Dmitriy V'jukov

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