Re: [PATCH 6/6] kvm/x86/mmu: include PT_PAGE_SIZE_MASK in PT64_PERM_MASK

[Avi Kivity]

Joerg Roedel wrote:
> We also need to do a remote tlb flush if the PSE bit changes. The
> pte_pfn should also change if this bit changes but we can't rely on
> that. So check this bit too to be on the save side.
>
> Signed-off-by: Joerg Roedel <joerg.roedel@xxxxxxx>
> ---
>  arch/x86/kvm/mmu.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
> index 2a36f7f..055b181 100644
> --- a/arch/x86/kvm/mmu.c
> +++ b/arch/x86/kvm/mmu.c
> @@ -121,7 +121,7 @@ module_param(oos_shadow, bool, 0644);
>  	(PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
>  
>  #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
> -			| PT64_NX_MASK)
> +			| PT64_NX_MASK | PT_PAGE_SIZE_MASK)
>  
>   

PT64_PERM_MASK is used in this way:

static bool need_remote_flush(u64 old, u64 new)
{
   if (!is_shadow_present_pte(old))
       return false;
   if (!is_shadow_present_pte(new))
       return true;
   if ((old ^ new) & PT64_BASE_ADDR_MASK)
       return true;
   old ^= PT64_NX_MASK;
   new ^= PT64_NX_MASK;
   return (old & ~new & PT64_PERM_MASK) != 0;
}

We don't check whether a bit changes, rather we check if a bit is turned 
off (or on in the case of nx).  But I think we need a tlb flush even if 
we change PSE from 0 to 1.

Thinking a bit more, this will never trigger, since an spte at a 
particular level cannot have its pse bit changed (at least in 
kvm_mmu_pte_write).

--
error compiling committee.c: too many arguments to function

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