Re: [PATCH] x86/pci: try to detect host_bridge pci_cfg_space

[Ingo Molnar]

* Yinghai Lu <yinghai@xxxxxxxxxx> wrote:

> H. Peter Anvin wrote:
> > H. Peter Anvin wrote:
> >> Yinghai Lu wrote:
> >>> Impact: get correct pci_cfg_size for host_bridge
> >>>
> >>> more host bridges support 4k cfg, so check them directly
> >>> instead of quirks.
> >>>
> >>> Signed-off-by: Yinghai Lu <yinghai@xxxxxxxxxx>
> >>
> >> I'm utterly confused by this.  This is basically saying we should try
> >> to probe for an extended device space for every host bridge. 
> >> Logically speaking, this is valid: if there is a valid path by which
> >> we can probe for byte 256 then it should succeed.
> >>
> >> HOWEVER, the same argument applies for *every single device*.  So if
> >> this does indeed work, why should we limit it to host bridges?
> >>
> > 
> > Looking at the code (as opposed to just the patch) made it a bit
> > clearer.  The argument you're making here is that only host bridges are
> > known to have extended address space without also having a PCI-X
> > extension header, right?
> 
>  
> Yes.

This too should go into the v2 patch description. 

I'd also suggest to flip around the subject line from x86/pci to 
pci/x86 - it's more of a PCI patch than a pure x86 patch. The 
same problem could affect other platforms too i suspect.

	Ingo
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