Re: [git-pull -tip] x86: Basic AMD Support for performance counters

[Ingo Molnar]

* Ingo Molnar <mingo@xxxxxxx> wrote:

> * Jaswinder Singh Rajput <jaswinder@xxxxxxxxxx> wrote:
> 
> > Hello Ingo,
> > 
> > These patches added basic AMD (K7 and later) support for performance counters:
> > 
> > [jaswinder@hpdv5 linux-2.6-tip]$ perfstat -e 0,1,2,3,4,5,-1,-2,-3,-4,-5 ls -lR > /dev/null
> > 
> >  Performance counter stats for 'ls':
> > 
> >     2723.203821  task clock ticks     (msecs)
> > 
> >      1812527794  CPU cycles           (events)
> >      1121688997  instructions         (events)
> >       569836744  cache references     (events)
> >        15934598  cache misses         (events)
> >        57313261  branches             (events)
> >         4243201  branch misses        (events)
> >     2639.682866  cpu clock ticks      (msecs)
> >     2723.203821  task clock ticks     (msecs)
> >             647  pagefaults           (events)
> >            2401  context switches     (events)
> >               3  CPU migrations       (events)
> > 
> >  Wall-clock time elapsed:  6813.030975 msecs
> 
> Very nice feature!
> 
> The AMD patches look much cleaner than i feared they would be. 
> It seems you were able to keep pretty generic x86 code in 
> arch/x86/kernel/cpu/perf_counters.c, sharing most of the logic 
> between Intel and AMD perfcounters.

Seems to be working fine, here's the output from an Athlon 64 
3200+ (Sempron) box:

 Performance counter stats for 'ls':

      17.420811  task clock ticks     (msecs)

              0  CPU migrations       (events)
             12  context switches     (events)
            583  pagefaults           (events)
       29760299  CPU cycles           (events)
       29401642  instructions         (events)
       12698498  cache references     (events)
          66269  cache misses         (events)

 Wall-clock time elapsed:   687.999988 msecs

	Ingo
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