Re: Subject: [PATCH] x86/pci: Detect mmconfig on nVidia MCP55 -v2

From: Ed Swierk
Date: Wed Feb 11 2009 - 17:00:47 EST


On Tue, Feb 10, 2009 at 9:05 PM, Yinghai Lu <yinghai@xxxxxxxxxx> wrote:
> try to make thing simple.
> for system: with AMD Fam10h, and MCP55 + 2 IO55
> amd fam10h cpu: said it needs [0,0]
> mcp55: said it need [0,255]
> io55 #1: said it need [0x40, 0x40+255], then u8 end_bus_number = 0x3f
> io55 #2: said it need [0x80, 0x80+255], then u8 end_bus_number = 0x7f
> MMIO route in NBs is right.

Oh, I misinterpreted your earlier comment--I thought you were
referring to 0x40, 0x80, 0xc0 as devfns, not bus numbers. The MCP55 is
on device 0 on our board as well.

> but MCFG is right... so just use that.
>
> when acpi=off, if check_and_enable_amd_mconf, it will forcely to make
> amd fam10h cpu: said it needs [0,255] and pci_mmcfg_config_num = 1
> so mcp55 mconf is not used.

OK, I'm just pointing out that the existing mmconfig hostbridge
detection code overrides ACPI MCFG. Past commit comments suggest that
the hostbridge registers are more trustworthy than ACPI on some
boards.

--Ed
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