Re: 2.6.27-rc3: 'APIC error on CPU1: 00(40)', but only on resume!

[Yinghai Lu]

On Thu, Aug 21, 2008 at 5:20 AM, Vegard Nossum <vegard.nossum@xxxxxxxxx> wrote:
> On Thu, Aug 21, 2008 at 1:51 PM, Maciej W. Rozycki <macro@xxxxxxxxxxxxxx> wrote:
>>  Otherwise there is no correlation between the sequence of APIC writes and
>> an error triggering -- a bad vector in a LVT or interrupt redirection
>> entry will be reported whenever its associated interrupt line gets active
>> even though the entry might have been initialised long ago.  Depending on
>> the device signalling hardware interrupts may quite often be ignored for a
>> long time without affecting the stability of the rest of the system.
>
> Ah, right. Here is a dump of the LVT registers:
>
> [00000320] = 000100ef
> [00000330] = 00000200
> [00000340] = 00010000
> [00000350] = 00010700
> [00000360] = 00000400
> [00000370] = 000000fe
>
> Maybe I've misunderstood something (again), but should those vectors
> really be 0 for 330-360? (At least 330 + 360, which are not masked.)
>
> Intel manual says: "Receive Illegal Vector : Set when the local APIC
> detects an illegal vector in the message it received, including an
> illegal vector code in the local vector table interrupts or in a
> self-interrupt."
>
> And 0 is clearly an illegal value for the vector code: "When an
> interrupt vector in the range 0 to 15 is sent or received through the
> local APIC, the APIC indicates an illegal vector in its Error Status
> Register [...]".

can you try dump the io apic registers too?

YH
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