Re: [patch 0/6] AMD C1E aware idle support

[Pavel Machek]

Hi!

> > > AMD CPUs with C1E support are currently excluded from high resolution
> > > timers and NOHZ support. The reason is that C1E is a BIOS controlled
> > > C3 power state which switches off TSC and the local APIC timer. The
> > > ACPI C-State control manages the TSC/local APIC timer wreckage, but
> > > this does not include the C1 based ("halt" instruction) C1E mode. The
> > > BIOS/SMM controlled C1E state works on most systems even without
> > > enabling ACPI C-State control.
> > 
> > What a mess.

Yep, seems like AMD is breaking C1 semantics. Is it even valid from
ACPI spec point of view?

> > What is the measured power savings that justifies this effort?
> 
> IMHO the power savings are not that important when such a kernel runs
> on bare metal:

Ok, so maybe we should disable C1E to work around its misdesign?

It would be certainly nice to have noc1e command line option...

>   But overall no measurable difference in power usage was seen.

							Pavel
-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/