Re: HELP: Is writeq an atomic operation??

[H. Peter Anvin]

Alan Cox wrote:
> > > I don't have an authoritative answer, but I can say that I coded
> > > drivers/infiniband/hw/mthca and .../mlx4 assuming that writeq() is
> > > atomic in the sense that you say, and no one has reported any problems.
> > If you're not under lock you're screwed on a 32-bit platform.
>
> So what cycles does an MMX, SSE or double float store generate on the
> bus ?

Those do generate 64-bit stores; it's just *really* expensive to do it 
in the kernel.  I have used that trick to test 64-bit hardware in a 
32-bit only system, though.

	-hpa
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