Re: hpet_late_init hang

From: Ingo Molnar
Date: Wed Jan 16 2008 - 01:51:57 EST



(Balaji Cc:-ed)

* Yinghai Lu <yhlu.kernel@xxxxxxxxx> wrote:

> "
> commit e5ed385fa0d6f35406e3e3ed75e5eb9adeb811df
> Author: Balaji Rao <balajirrao@xxxxxxxxx>
> Date: Tue Jan 15 16:53:29 2008 +0100
>
> Assign IRQs to HPET Timers
> "
> in x86.git
>
> cause my servers hang
> after
> Calling initcall 0xffffffff80b9a465: hpet_late_init+0x0/0x100()

i'm wondering, where does it hang exactly and why?

> after reverting that I got:
>
> initcall 0xffffffff80b947d1 ran for 19 msecs: pci_iommu_init+0x0/0x13()
> Calling initcall 0xffffffff80b9a465: hpet_late_init+0x0/0x100()
> hpet0: at MMIO 0xfed00000, IRQs 2, 8, 31
> hpet0: 3 32-bit timers, 25000000 Hz
> initcall 0xffffffff80b9a465: hpet_late_init+0x0/0x100() returned 0.
> initcall 0xffffffff80b9a465 ran for 7 msecs: hpet_late_init+0x0/0x100()
>
> CPU0 CPU1 CPU2 CPU3 CPU4 CPU5
> CPU6 CPU7
> 0: 86 0 0 0 0 0
> 1 0 IO-APIC-edge timer
> 4: 0 0 0 0 0 0
> 1 838 IO-APIC-edge serial
> 7: 1 0 0 0 0 0
> 0 0 IO-APIC-edge
> 8: 0 0 0 0 0 0
> 0 0 IO-APIC-edge rtc0
>
> for mcp55, it should already route hpet to ioapic pin2 or the irq0.

hm, these new bits:

+ /* Assign IRQs statically for legacy devices */
+ hpetp->hp_dev[0].hd_hdwirq = hdp->hd_irq[0];
+ hpetp->hp_dev[1].hd_hdwirq = hdp->hd_irq[1];

seem to be different from where we came from:

- for (i = 2; i < nrtimers; timer++, i++)
- hd.hd_irq[i] = (timer->hpet_config & Tn_INT_ROUTE_CNF_MASK) >>
- Tn_INT_ROUTE_CNF_SHIFT;

Ingo
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