Re: SCSI breakage on non-cache coherent architectures

From: Thomas Bogendoerfer
Date: Tue Nov 20 2007 - 04:39:23 EST


On Tue, Nov 20, 2007 at 06:51:14AM +1100, Benjamin Herrenschmidt wrote:
>
> On Mon, 2007-11-19 at 00:38 -0800, David Miller wrote:
> > From: Benjamin Herrenschmidt <benh@xxxxxxxxxxxxxxxxxxx>
> > Date: Mon, 19 Nov 2007 16:35:23 +1100
> >
> > > I'm not sure what is the best way to fix that. Internally, I've done
> > > some test whacking some ____cacheline_aligned in the scsi_cmnd data
> > > structure to verify I no longer get random SLAB corruption when using my
> > > USB but that significantly bloats the size of the structure on archs
> > > such as ppc64 that don't need it and have a large cache line size.
> > >
> > > Unfortunately, I don't think there's any existing Kconfig symbol or arch
> > > provided #define to tell us that we are on a non-coherent arch afaik
> > > that could be used to make that conditional.
> > >
> > > Another option would be to kmalloc the buffer (wasn't it the case before
> > > btw ?) but I suppose some people will scream at the idea due to how the
> > > command pools are done...
> >
> > You could make a ____dma_cacheline_aligned and use that.
> > It seems pretty reasonable.
>
> I was thinking about that. What archs would need it ? arm, mips, what
> else ?

older parisc

Thomas.

--
Crap can work. Given enough thrust pigs will fly, but it's not necessary a
good idea. [ RFC1925, 2.3 ]
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