Re: [BUG] (regression) AMD k6-III/450 won't boot w/2.6.22-rc1

[Dave Jones]

On Wed, May 16, 2007 at 02:11:56PM -0500, Bob Tracy wrote:

 > flags		: fpu vme de pse tsc msr mce cx8 pge mmx syscall 3dnow k6_mtrr
 > bogomips	: 902.78
 > clflush size	: 32

Ah so it really does think it has mce.
I just dug out the datasheet for the K6-3, and true enough, it did have MCE, however,
it isn't intel compatible. It has two MSRs (MCAR at 0x0, and MCTR at 0x01).
Then the punchline..

"Because the processor does not support machine check exceptions, the contents of the
MCAR and MCTR are only affected by the WRMSR instruction and by RESET being sampled
asserted (where all bits in each register are reset to 0)."

In short, it's useless.
We could clear the capability bit and pretend it isn't there, at no loss of
functionality, or we could revert back to doing model checks instead of cpuid flag checks.

	Dave

-- 
http://www.codemonkey.org.uk
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