Re: Ordering between PCI config space writes and MMIO reads?

[Roland Dreier]

 > I'm looking at arch/ia64/pci/pci.c.
 > Wouldn't it be reasonable to include memory barriers around calls
 > to SAL config space access functions?

It's reasonable, but is there a memory barrier strong enough to
guarantee that a config write has actually completed?

 - R.
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