Re: How to correct ELCR? - was Re: [PATCH 2.6.16] Shared interrupts sometimes lost

[Pavel Machek]

Hi!

> > >  However there is room for a race here.  If an event occurs between
> > >  the read and the write, then this will NOT de-assert the IRQ line.
> > >  It will remain asserted throughout.
> > > 
> > >  Now if the IRQ is handled as an edge-triggered line (which I believe
> > >  they are in Linux), then losing this race will mean that we don't see
> > >  any more interrupts on this line.
> > 
> > PCI interrupts should always be level triggered, not edge triggered 
> 
> Ok... so I guess I jumped to the wrong conclusion. Thanks for
> straightening me out.
> But it is behaving like edge-triggered..
> 
> So I have explored about the i8259 (wikipedia helped) and discovered
> the ELCR (Edge/Level Control Register).  Apparently this is meant to
> be set up by the BIOS to the correct values.  It seems that this isn't
> happening. 
> 
> It seems to get the value 0x0800 which corresponds to IRQ11 being the
> only level-triggered interrupt.  But I need IRQ10 to be level
> triggered.  I hacked the code to set the 0x0400 bit, and it seems to
> work OK without my other patch.
> 
> Now I just need a way to set this correctly at boot time without a
> hack.
> 
> I currently have Linux compiled without ACPI support (as I don't
> really want that and being an oldish notebook I gather it has a good
> chance of causing problems) so that isn't fiddling with the ELCR.

Can you try to enable ACPI and/or APIC? Some machines are known to
require APIC...
								Pavel

-- 
Thanks for all the (sleeping) penguins.
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