Nick Piggin <nickpiggin@xxxxxxxxxxxx> wrote:
(2) Those that have CMPXCHG or equivalent: 68020, i486+, x86_64, ia64,
sparc.
(3) Those that have LL/SC or equivalent: mips (some), alpha, powerpc, arm6.
cmpxchg is basically exactly equivalent to a store-conditional, so 2 and 3
are the same level.
No, they're not. LL/SC is more flexible than CMPXCHG because under some
circumstances, you can get away without doing the SC, and because sometimes
you can do one LL/SC in lieu of two CMPXCHG's because LL/SC allows you to
retrieve the value, consider it and then modify it if you want to. With
CMPXCHG you have to anticipate, and so you're more likely to get it wrong.
I don't know why you don't implement a "good" default implementation with
atomic_cmpxchg.
Because it wouldn't be a good default.
I'm thinking the best default is simply
to wrap a counting semaphore.