Re: [PATCH -mm] x86 port lockless MCE quirky bank0

[Andrew Morton]

Andi Kleen <ak@xxxxxxx> wrote:
>
> > +	if ((c->x86_vendor == X86_VENDOR_AMD ||
> > +	     c->x86_vendor == X86_VENDOR_INTEL) && c->x86 == 6) {
> > +		/*
> > +		 * Intel P6 cores go bang quickly when bank0 is enabled.
> > +	 	 * Some Athlons cause spurious MCEs when bank0 is enabled.
> > +		 */
> > +		quirky_bank0 = 1;
> > +	}
> 
> That's wrong on K8 AMD machines at least. You need to check c->x86
> there too.
> 
> And better would be to just do bank[0] = 0 instead of
> adding the new variable.
> 
> -Andi
> 
> P.S.: Also Yu Luming can you please submit an updated patch that keeps mce.c
> in arch/x86_64 like we discussed earlier?

Yes.  I'll drop the following from -mm:

x86-port-lockless-mce-preparation.patch
x86-port-lockless-mce-implementation.patch
x86-port-lockless-mce-implementation-fix.patch
x86-port-lockless-mce-implementation-fix-2.patch

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