Re: [Discuss][i386] Platform SMIs and their interferance with tscbased delay calibration

[Martin Wilck]

Venkatesh Pallipadi wrote:

> (0) Estimate a value for loops_per_jiffy
> (1) While (loops_per_jiffy estimate is accurate enough)
> (2)   wait for jiffy transition (jiffy1)
> (3)   Note down current tsc (tsc1)
> (4)   loop until tsc becomes tsc1 + loops_per_jiffy
> (5)   check whether jiffy changed since jiffy1 or not 
> and refine loops_per_jiffy estimate

> Case 2: If SMIs happen between (3) and (4) above, then we can end up
> with a loops_per_jiffy value that is too high.

I don't think this can really happen (at least not on the bootstrap CPU) 
because even if an SMI occurs, the CPU must first serve the timer 
interrupt and increment jiffies before it continues looping.

However "LPJ too short" is what needs to be avoided at all cost.

Regards and thanks for working on this problem,
Martin
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