RE: [Discuss][i386] Platform SMIs and their interferance with tsc based delay calibration

[Pallipadi, Venkatesh]

>-----Original Message-----
>From: Andi Kleen [mailto:ak@xxxxxx] 
>Sent: Friday, January 28, 2005 10:24 PM
>To: Pallipadi, Venkatesh
>Cc: Seth, Rohit; Mallick, Asit K; 
>linux-kernel@xxxxxxxxxxxxxxx; akpm@xxxxxxxx
>Subject: Re: [Discuss][i386] Platform SMIs and their 
>interferance with tsc based delay calibration
>
>Venkatesh Pallipadi <venkatesh.pallipadi@xxxxxxxxx> writes:
>> +
>> +	/*
>> +	 * If the upper limit and lower limit of the tsc_rate 
>is more than
>> +	 * 12.5% apart.
>> +	 */
>> +	if (pre_start == 0 || pre_end == 0 ||
>> +	    (tsc_rate_max - tsc_rate_min) > (tsc_rate_max >> 3)) {
>> +		printk(KERN_WARNING "TSC calibration may not be 
>precise. " 
>> +		       "Too many SMIs? "
>> +		       "Consider running with \"lpj=\" boot option\n");
>> +		return 0;
>> +	}
>
>I think it would be better to rerun it a few times automatically
>before giving up. This way it would hopefully work 
>transparently but slower
>for most users. 

Agreed. Actually, I was doing that earlier, with each retry 
calibrating for 1 HZ. But, once I moved to 10 HZ, I removed the retires.

>The message is too obscure too to be usable and needs
>more explanation.

I will try to improve the message in next revision of the patch.

>And also in case the platforms in questions support EM64T 
>x86-64 would need to be changed too :)

Yes. I will send out a patch for x86-64 too, once the i386 patch 
gets finalized. I wanted to have a shorted patch reviewed first :).

Thanks,
Venki
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