ixdp4xx restart. watchdog enable value

[Ara Avanesyan]

in file: include/asm-arm/arch-ixp4x//system.h
function: arch_reset

code snap --
/* disable watchdog interrupt, enable reset, enable count */
*IXP4XX_OSWE = 0x3;
--

according to intel's documentation the appropriate bits are in the
following order:
bit 2: wdog_cnt_ena
bit 1: wdog_int_ena
bit 0: wdog_rst_ena

so the above assigned value should be 101b == 0x5.
I do not know why 0x3 works at all. Btw, u-boot assigns 0x5.

This is for all kernels I had a chance to look at (2.4.20-2.6.10).

__
Thanks,
Ara

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