Re: [Bugme-new] [Bug 2019] New: Bug from the mm subsystem involvingX (fwd)
From: Nick Piggin
Date: Sat Feb 07 2004 - 01:38:35 EST
Martin J. Bligh wrote:
--Andi Kleen <ak@xxxxxxx> wrote (on Saturday, February 07, 2004 04:54:03 +0100):
"Martin J. Bligh" <mbligh@xxxxxxxxxxx> writes:
If we really want to do good testing, we should make a fake NUMA config
that can run a 4x SMP box as fake NUMA, with half the memory in each
"node" and half the processors ... but I never got around to coding that ;-)
I have such a patch for x86-64 if anybody is interested in that.
x86-64 low level NUMA is quite different from IA32 NUMA though so it
would be a bit difficult to port.
Not quite sure what you mean ... I was driving at pretending an SMP box
was NUMA ... but the x86_64 is already NUMA ... are you grouping nodes
together into single nodes with 2 cpus each?
What might be intriguing is to use Nick's domains stuff to create a heirarchy
for the scheduler where we have 1 cpu nodes and 2 cpu nodes above that, but
still keep the normal NUMA stuff flat for mem allocation. What might be
interesting is a heirarchy where if this is the HT connections of cpu layouts:
1 --- 2
| |
| |
| |
3 --- 4
then domains of (1,2,3) (2,3,4) (1,3,4) (1 2 4), with a view to restricting
the "double hop" traffic as much as possible. But I'm not sure the domains
code copes with multiple overlapping domains - Nick?
Yes it can do ring topologies like this. I'm pretty sure it can do
just about any sort of topology although this is one that I sat
down and drew when designing it.
You can technically restrict a double hop, but after you move, say,
clockwise once, you might just as easily be moved clockwise again.
The only way to restrict this is with some kind of home domain thing.
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