Re: [PATCH] ide write barrier support

[Jeff Garzik]

Jens Axboe wrote:
> On Mon, Oct 13 2003, Jeff Garzik wrote:
>
> > Matthias Andree wrote:
> >
> > > On Mon, 13 Oct 2003, Jens Axboe wrote:
> > >
> > >
> > >
> > > > Forward ported and tested today (with the dummy ext3 patch included),
> > > > works for me. Some todo's left, but I thought I'd send it out to gauge
> > > > interest. TODO:
> > > >
> > > > - Detect write cache setting and only issue SYNC_CACHE if write cache is
> > > > enabled (not a biggy, all drives ship with it enabled)
> > >
> > >
> > > Yup, and I disable it on all drives at boot time at the latest.
> > >
> > > Is there a status document that lists
> > >
> > > - what SCSI drivers support write barriers
> > > (I'm interested in sym53c8xx_2 if that matters)
> > >
> > > - what IDE drivers support write barriers
> > > (VIA for AMD and Intel for PII/PIII/P4 chip sets here)
> >
> > The device is the entity that does, or does not, support flush-cache... 
> > All IDE chipsets support flush-cache... it's just another IDE command.
>
>
> Well drivers need to support it, too. IDE is supported, and that covers
> all devices that support it. It's not implemented on SCSI at all right
> now, that's coming up.

I do not see the need for write barrier support in 
drivers/ide/pci/{via82cxxx,piix,}.c, which is the question the original 
poster was asking.

Low-level chipset drivers should _not_ need to support it, the subsystem 
can do that.

	Jeff



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