On Wed, 2003-08-06 at 01:52, Mathias Fröhlich wrote:
> Hi,
>
> You should not remove the barrier past mtrr change. If you do that, it is
> possible that cpu's run with inconsistent mtrrs. This can have bad
> sideeffects since at least the cache snooping protocol used by intel uses
> assumptions about the cachability of memory regions. Those information about
> the cachability is also taken from the mtrrs as far as I remember.
> This intel cpu developer manual, which documented the early PII and PPro
> chips, recommended this algorithm. Since actual intel cpus use the same old
> cpu to chipset bus protocol, this old documentation most propably still
> applies.
Hmm. I should dig up that doc. Its a little hazy in my mind, but I think
I understand your description. I'm glad you caught this, as I can't
imagine the subtle bugs that might have popped up.
Well, let me look at it again and see if I can come up with a proper
fix.
Thanks for the knowledgeable feedback and sanity checking!
-john
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