Re: PCI1410 Interrupt Problems

From: Russell King (rmk@arm.linux.org.uk)
Date: Sun Aug 03 2003 - 16:23:15 EST


On Sun, Aug 03, 2003 at 10:15:09PM +0200, Jochen Friedrich wrote:
> when using this PCI Cardbus bridge, i got an interrupt assigned to the
> card by the BIOS, but no interrupts were ever delivered, at all. So no
> insert/remove events have been handled and devices couldn't generate
> interrupts, as well:
>
> 02:0a.0 Class 0607: 104c:ac50 (rev 01)
> 02:0a.0 CardBus bridge: Texas Instruments PCI1410 PC card Cardbus Controller (rev 01)
> Flags: bus master, medium devsel, latency 168, IRQ 9
> Memory at 14000000 (32-bit, non-prefetchable) [size=4K]
> Bus: primary=02, secondary=03, subordinate=06, sec-latency=176
> Memory window 0: 14400000-147ff000 (prefetchable)
> Memory window 1: 14800000-14bff000
> I/O window 0: 00004000-000040ff
> I/O window 1: 00004400-000044ff
> 16-bit legacy interface ports at 0001
>
> It looks like the designers of this card "forgot" to put a sane
> configuration of the Multifunction Routing Register (0x8C) in their
> EEPROM. After setting up the INTA output pin of the PCI1410, the device
> started to work like a charm :-)
>
> This i added to yenta_config_init():
>
> config_writew(socket, 0x8C, 0x02);
>
> I'm not sure if this will help with all of these devices of if it even
> makes problems on others. But it might be an idea to add a config option
> for this hack...

Can you provide the kernel messages without the hack applied please?

-- 
Russell King (rmk@arm.linux.org.uk)                The developer of ARM Linux
             http://www.arm.linux.org.uk/personal/aboutme.html

- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/



This archive was generated by hypermail 2b29 : Thu Aug 07 2003 - 22:00:22 EST