Ok the big problem I'm having with this code is understanding why most
of it even exists. Is this chip subtly different in some way I am
missing and so unable to use the generic PCI stuff or is most of the
copied code simply not needed.
As far as I can see the only "weirdness" it has is that the base
registers are off a non standard BAR. Thats something we already support
in the core IDE PCI code (see the cs5520 Kahlua driver in 2.6.0test)
Work was also done recently to allow clean wrapping of the generic DMA
stuff for devices that had to do custom setup around each IDE DMA (eg
Basically - in what was is your controller not the same as generic MWDMA
capable IDE ?
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to firstname.lastname@example.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
This archive was generated by hypermail 2b29 : Wed Jul 23 2003 - 22:00:29 EST