Fixes transmit FIFO overrun that affects ST16654 UART only.
Bug found by William King [William.King@dadaboom.com]
Symptom: random loss of transmit data, worse at low baud rates.
Cause: on 16654 UART, default transmit FIFO trigger level is 8
instead of zero, so full FIFO depth is not available
when transmit interrupt arrives. Race between UART
transmitting last 8 bytes still in TX FIFO and driver
writing full FIFO length of new data to TX FIFO.
diff -Naur -X dontdiff.txt linux-2.4.20/drivers/char/serial.c
patched-2.4.20/drivers/char/serial.c
--- linux-2.4.20/drivers/char/serial.c Thu Nov 28 15:53:12 2002
+++ patched-2.4.20/drivers/char/serial.c Tue May 27 15:14:58 2003
@@ -306,8 +306,8 @@
{ "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO},
{ "Startech", 1, 0}, /* usurped by cyclades.c */
{ "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO},
- { "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO |
- UART_STARTECH },
+ { "ST16654", 64-8, UART_CLEAR_FIFO | UART_USE_FIFO |
+ UART_STARTECH }, /* ST16654 xmit trigger lvl = 8 */
{ "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO |
UART_STARTECH },
{ "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO },
-
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