RE: 2.5.67-mm4 & IRQ balancing

From: Nakajima, Jun (jun.nakajima@intel.com)
Date: Fri Apr 18 2003 - 20:03:12 EST


Can you try to stress some (e.g. aic7xxx) of them (use dd, for example), and check what happens? I assume they are not HT-capable.

Thanks,
Jun

> -----Original Message-----
> From: Philippe Gramoullé [mailto:philippe.gramoulle@mmania.com]
> Sent: Friday, April 18, 2003 4:59 PM
> To: linux-kernel@vger.kernel.org
> Subject: 2.5.67-mm4 & IRQ balancing
> Importance: High
>
>
> Hello,
>
> It may be not related to -mm4 only but as i hadn't checked before ( with
> 2.5.x kernels),
> I just wonder about /proc/interrupts output:
>
> $ cat /proc/interrupts
> CPU0 CPU1
> 0: 47851610 0 IO-APIC-edge timer
> 1: 51789 0 IO-APIC-edge i8042
> 2: 0 0 XT-PIC cascade
> 3: 171 0 IO-APIC-edge serial
> 8: 772066 0 IO-APIC-edge rtc
> 12: 3 0 IO-APIC-edge i8042, i8042, i8042, i8042
> 15: 58 1 IO-APIC-edge ide1
> 16: 47047 0 IO-APIC-level ohci1394
> 18: 391753 0 IO-APIC-level EMU10K1
> 19: 911863 0 IO-APIC-level uhci-hcd
> 20: 261806 0 IO-APIC-level eth0
> 22: 273648 0 IO-APIC-level aic7xxx
> 23: 0 0 IO-APIC-level uhci-hcd
> NMI: 47853468 47852927
> LOC: 47860500 47860630
> ERR: 0
> MIS: 0
>
> Shouldn't the interrupts be balanced on both CPUs ?
>
> DELL MT 530 Ws , SMP Xeon 1.5Ghz, 512 Mo RAM on Debian Unstable.
>
> Thanks,
>
> Philippe
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