On Fri, 2002-08-30 at 01:19, Alan Cox wrote:
> On Wed, 2002-08-28 at 13:11, Pavel Machek wrote:
> > > Unfortunately with this patch executing invalid code will cause the
> > > processor to enter an infinite exception loop rather than panic. Fixing
> > > this is not trivial for SMP+preempt so it's not done at the moment.
> >
> > Using 0xcc for everything should fix that, right?
>
> Except you can't do the fixup on SMP without risking hitting the CPU
> errata.
Worked around by making sure all other processors are stopped (iret is
serializing) sending IPIs if they are not already spinning on the fixup
lock. See patch #2.
> You also break debugging tools that map kernel code pages r/o
> and people who ROM it.
>
> The latter aren't a big problem (they can compile without runtime
> fixups).
OK, I'll add a config option for this.
> For the other fixups though you -have- to do them before you
> run the code. That isnt hard (eg sparc btfixup). You generate a list of
> the addresses in a segment, patch them all and let the init freeup blow
> the table away
Is doing them at runtime with the aforementioned workaround fine?
This archive was generated by hypermail 2b29 : Sat Aug 31 2002 - 22:00:29 EST