Re: [PATCH] tsc-disable_B9

From: john stultz (johnstul@us.ibm.com)
Date: Fri Aug 09 2002 - 12:46:53 EST


On Fri, 2002-08-09 at 02:17, Alan Cox wrote:
> On Fri, 2002-08-09 at 03:30, john stultz wrote:
> > Not sure I followed that, do you mean per-cpu TSC management for
> > gettimeofday?
>
> We have some x86 setups where people plug say a 300MHhz and a 450MHz
> celeron into the same board. This works because they are same FSB,
> different multiplier (works and intel certify being two different
> things)

Oh yes, with the old NUMAQ hardware here, one can mix nodes of different
speed cpus. Once I get a chance, I'm going to begin working on this
issue for 2.5. My plan right now is to keep per-cpu last_tsc_low and
fast_gettimeoffset_quotient values, then round robin the timer
interrupt.

 
> Needless to say tsc does not work well on such boxes. Thats why I don't
> trust the tsc at all in such cases. Since you'll have the nice cyclone
> timer for the Summit it seems best not to trust it, and on the summit to
> use the cyclone for udelay as well ?
>
> I agree dodgy_tsc needs to change name. Perhaps we actually want
>
> int tsc = select_tsc();
>
> switch(tsc)
> {
> case TSC_CYCLONE:
> case TSC_PROCESSOR:
> case TSC_NONE:
> ..
> }

Sounds good. I'll re-work my patch and resubmit.

thanks!
-john

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