Re: PCI DMA to small buffers on cache-incoherent arch

From: Roland Dreier (
Date: Mon Jun 10 2002 - 10:59:48 EST

>>>>> "David" == David S Miller <> writes:

    Paul> This is the problem scenario. Suppose we are doing DMA to a
    Paul> buffer B and also independently accessing a variable X which
    Paul> is not part of B. Suppose that X and the beginning of B are
    Paul> both in cache line C.
    David> I see what the problem is. Hmmm...

    David> I'm trying to specify this such that knowledge of
    David> cachelines and whatnot don't escape the arch specific code,
    David> ho hum... Looks like that isn't possible.

So is the consensus now that in general drivers should make sure any
buffers passed to pci_map/unmap are aligned to SMP_CACHE_BYTES (and a
multiple of SMP_CACHE_BYTES in size)? In other words if a driver uses
an unaligned buffer it should be fixed unless we can prove (and
document in a comment :) that it won't cause problems on an arch
without cache coherency and with a writeback cache.

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This archive was generated by hypermail 2b29 : Sat Jun 15 2002 - 22:00:18 EST