Robert Schwebel wrote:
> Alternate Gate A20 Control Register (Port 00EEh) A special 8-bit
> read/write control register provides a fast and reliable way to control
> the CPU A20 signal. A dummy read of this register returns a value of FFh
> and forces the CPU A20 to propagate to the core logic, while a dummy write
> to this register will cause the CPU A20 signal to be forced Low as long as
> no other A20 gate control sources are forcing the CPU A20 signal to
> But neither this nor the register description ("Alternate GateA20 Control
> This register can be used to cause the same type of masking of the CPU A20
> signal that was historically performed by an external SCP (System Control
> Processor) in a PC/AT Compatible system, but much faster.") says something
> about _how_ fast it is done.
Right, so you need the explicit synchronization.
Do you happen to know if there is an easy and safe way to detect an Elan
at runtime? If so, it might make more sense to make this a runtime
> Hmm, there is no special section for chipset issues, the only ones I could
> find are "Toshiba Laptop support" and "Dell Laptop Support" (also in
> "Processor type and features"). Other chipset bugfix options are in the
> IDE driver section, but this doesn't apply here. So the options would be
> - add something like "Elan Support" in "Processor type and features"
> - add a new section for general chipset fixes
> What do you think?
"Processor type and features" is good enough for now, I think. It's not
a very large section.
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This archive was generated by hypermail 2b29 : Mon Jan 07 2002 - 21:00:15 EST