> the bios set it to something less than we expect it to, or to leave
> this kind of pci hackery to the generic pci layer. It's important to
> note that quite a few drivers share this bug at present. Cheers,
Time for pci_set_cacheline_size() ?
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This archive was generated by hypermail 2b29 : Tue Oct 23 2001 - 21:00:41 EST