Re: x86 ptep_get_and_clear question

From: Manfred Spraul (
Date: Thu Feb 15 2001 - 13:51:59 EST

Kanoj Sarcar wrote:
> Okay, I will quote from Intel Architecture Software Developer's Manual
> Volume 3: System Programming Guide (1997 print), section 3.7, page 3-27:
> "Bus cycles to the page directory and page tables in memory are performed
> only when the TLBs do not contain the translation information for a
> requested page."
> And on the same page:
> "Whenever a page directory or page table entry is changed (including when
> the present flag is set to zero), the operating system must immediately
> invalidate the corresponding entry in the TLB so that it can be updated
> the next time the entry is referenced."

But there is another paragraph that mentions that an OS may use lazy tlb
[search for shootdown]

You check the far too obvious chapters, remember that Intel wrote the
documentation ;-)
I searched for 'dirty' though Vol 3 and found

Chapter Automatic locking.

.. the processor uses locked cycles to set the accessed and dirty flag
in the page-directory and page-table entries.

But that obviously doesn't answer your question.

Is the sequence
<< lock;
read pte
pte |= dirty
write pte
>> end lock;
<< lock;
read pte
if (!present(pte))
pte |= dirty
write pte.
>> end lock;

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This archive was generated by hypermail 2b29 : Thu Feb 15 2001 - 21:00:27 EST