Re: [preview] VIA IDE 4.0 and AMD IDE 2.0 with automatic PCI clock detection

From: Vojtech Pavlik (
Date: Fri Feb 09 2001 - 10:58:47 EST

On Fri, Feb 09, 2001 at 10:05:44AM -0500, Byron Stanoszek wrote:

> > I've decided that too much trouble has been caused by a wrong PCI clock
> > specified to the IDE drivers (which in turn compute wrong IDE timings).
> >
> > I've made the VIA and AMD drivers detect the PCI clock automatically.
> > Because this is a very significant change, I've upped the major release
> > numbers to 4 and 2.
> >
> > Could anyone with these chipsets check these drivers if they detect the
> > PCI clock correctly on their systems?
> Certainly. I tested this on my machine with PCIClk 33, 34, and 36.6. The driver
> correctly tuned the clocks to 33, 34, and 37 (expected and not harmful). It
> works very well.

Great! I'm glad to hear that it works also elsewhere that on my test

> One thing to note: You should probably display the new clock speed in the
> kernel debug messages on bootup.

Probably yes.

> Also I don't know if you've done this already,
> but if the user specifies an idebus=xx then that should override the auto
> detection.

It doesn't override it, that'd require patching the generic code so that
it doesn't return '33' in the default case.

> I do have a concern however. When you autodetect the PCI clock, does that
> propagate to other IDE controllers that have been initialized? For instance, my
> Abit KT7-Raid also has a Highpoint 370 controller. My fear is that it may get
> initialized to 33 before the VIA controller is started and before detecting
> that the true PCI clock is really 37. Unless the Highpoint controller has an
> external timing mechanism I think this could pose a problem.

It doesn't propagate, it's local to the via driver. Anyway, I've checked
the sources and the only driver that actually checks the system bus
speed other than my VIA and AMD drivers is the QD6580 VL-BUS IDE driver ...

All others assume 33 MHz PCI. Which in my opinion is a bug. Andre thinks
it's correct.

> If it could help things, maybe a patch can be made to the standard IDE setup
> routines that will replace the message "Assuming 33MHz for PIO modes" to
> "Autodetected PCI Clock at 37MHz". This would ensure that all the IDE drivers
> get set up with the correct detected PCI clock, and not just VIA/AMD's.

Unfortunately the PCI speed measuring code needs help from the chipset
itself, so it isn't possible to implement in generic code. Maybe a
callback could be added to the chipset-specific drivers, though ...

I do have some plans with ide-pci.c, so ...

Vojtech Pavlik
SuSE Labs
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