Re: UP APIC reenabling vs. cpu type detection ordering

From: H. Peter Anvin (
Date: Wed Feb 07 2001 - 13:00:01 EST

"Maciej W. Rozycki" wrote:
> > In other words, I'd like to see a reason for making any vendor-specific
> > determinations, and if so, they should ideally be centralized to the CPU
> > feature-determination code.
> It would be hard to decide how to classify it. It's something like "the
> CPU has a local APIC that we know how to handle in the non-MPS system".
> It might be viable just to delete the test altogether, though and just
> trap #GP(0) on the MSR access. For the sake of simplicity. If a problem
> with a system ever arizes, we may handle it then.
> Note that we still have to choose appropriate vendor-specific PeMo
> handling and an event for the NMI watchdog anyway.

Right... if that is the case then it seems reasonable.


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