Re: question about tulip patch to set CSR0 for pci 2.0 bus

From: Clayton Weaver (cgweav@eskimo.com)
Date: Fri Dec 15 2000 - 06:28:41 EST


SIS 85C496 on Asus sp3 appears to have an equivalent bug (same CSR0
setting fixes kernel deadlocks that occur when using the
non-burst-challenged 0x01A08000 setting), so if you're going to catch it
with a special case in the pci code, you need to catch that as well as the
Saturn II chipset.

Note: the pci probe (cat /proc/pci) on this machine says "No bursts" for
the host bridge.

Regards,

Clayton Weaver
<mailto:cgweav@eskimo.com>
(Seattle)

"Everybody's ignorant, just in different subjects." Will Rogers

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