Thanks for the info...
> [mailto:linux-kernel-owner@vger.kernel.org]On Behalf Of Jeff V. Merkey
> > So, is this related to the larger signal 11 problems?
>
> There's a corruption bug in the page cache somewhere, and it's 100%
> reproducable. Finding it will be tough....
Ok, granted this will be tough but is anyone even actively working on it?
What can I do to help?
> > Anyone know how to do [disable L1 and L2 caches]?
>
> Usually this is performed in the BIOS setup. You can also disable L1
> with a sequence of instructions that write to the CR0 register on intel
> and flip a bit, but in doing this you have to execute a WBINV (write
> back invalidate) instruction to flush out the cache. BIOS setup is
> probably simpler. Disabling Level I will make the machine slower
> than mollasses, BTW, and if this bug is race related (they always
> are) it won't help much in running it down.
Aha, just as I suspected. My BIOS doesn't appear to support this. You seem
to be saying that doing so won't really contribute anything anyway so I will
hold off for now.
--Rainer
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This archive was generated by hypermail 2b29 : Fri Dec 15 2000 - 21:00:26 EST