"David S. Miller" wrote:
> Interpreting physical BAR values is another issue altogether. Kernel
> wide interfaces for this may be easily added to include/asm/pci.h
> infrastructure, please just choose some sane name for it and I will
> compose a patch ok? :-)
There's a semi-respectable use for BAR values: peer-to-peer mastering.
A new kernel interface could actually make that portable, eg:
int pci_peer_master_address(struct pci_dev *master,
struct pci_dev *target, int resource, unsigned long offset,
unsigned long *address);
Return values PCI_PEER_OK, PCI_PEER_NOWAY, PCI_PEER_FXBUG,
PCI_PEER_YOURE_JOKING_RIGHT, ... Bus address usable by master placed in
address.
Implementing something like this with a single hostbridge is simple.
It's harder on boards like my Intel 840 motherboard here, where the
33MHz and 66MHz buses don't talk to each other. It could eventually grow
into a big list of platform specific workarounds, but at least they'd
all be in one place where we could see them.
- Adrian Cox, AG Electronics
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This archive was generated by hypermail 2b29 : Fri Dec 15 2000 - 21:00:24 EST