Re: [RFC] atomic pte updates for x86 smp

From: Cort Dougan (
Date: Wed Oct 11 2000 - 23:31:38 EST

} Date: Thu, 12 Oct 2000 00:03:31 -0400 (EDT)
} From: "Benjamin C.R. LaHaise" <>
} It's safe because of how x86s hardware works
} What about other platforms?

On the PPC's that don't do a hardware walk we do a normal write to the
hash table (with a spinlock). On the hardware walk PPC's I'm told this is
done with with a lwarx/stwcx pair (conditional load/store on exclusive

Any comments on how this would affect PPC?
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